Appeal No. 2003-0194
Application No. 09/280,112
and a working register within the CPU “mapped in the data memory”
(answer-page 3). The examiner asserts that Noguchi “did not
expressly detail” that the microcontroller was capable of any
operations on any register in any addressing mode; that a program
counter was used; and that there is a means and method for
selecting between a memory and a virtual bank wherein the virtual
bank comprised a combination of a partial memory space of the two
memory banks.
With regard to the first two denoted differences, the
examiner merely asserted the obviousness of not restricting
matching any of the addressing modes with any of the instruction
operations and of a program counter for keeping track of the
current instruction being executed.
With regard to the selecting between a memory and a virtual
bank, the examiner cites Lau for a virtual memory bank “where
boundaries for the virtual banks were designated to be with two
different memory banks” (answer-page 4) and finds that it would
have been obvious that “the bits used to indicate whether the
virtual bank boundary was enabled and the memory mapping means
(e.g., see fig.2) would have comprised means to select a virtual
or non-virtual memory bank in the Lau system” (answer-page 4).
The examiner also asserts that it would have been obvious to
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