Appeal No. 2003-0194
Application No. 09/280,112
references, nor has the examiner convincingly pointed to anything
in these references, showing a bank select unit for selecting a
bank wherein the selected bank “forms a register file” (as in
instant claim 2). Since there is no register file, there can be
no “arithmetic logic unit coupled with said register file.”
Further, the mapping described in Lau (where a memory controller
“maps” all of the memory locations in a virtual memory bank to a
first area on a memory map) does not appear to be the mapping
claimed, i.e., “a plurality of special function registers being
mapped to one of said banks in said data memory, wherein one of
said special function registers is a working register being
coupled with said arithmetic logic unit” (claim 2).
With regard to the “working register,” the examiner relies
on element 401 of Noguchi. We do not regard this element as a
“working register,” as set forth in instant claims 1 and 2,
because no “special function” (claim 2) or mapping of this
“working register” in a data memory (claim 1) has been shown by
the examiner. To the extent the examiner relies on Lau, as
explained supra, there would have been no reason to modify any
register in Noguchi in order to arrive at the claimed “working
register.”
With regard to the claimed “bank select unit,” the examiner
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