Appeal No. 2002-1187
Application No. 09/403,115
BACKGROUND
Appellant's invention relates to a microprocessor system for safety-critical control
systems. An understanding of the invention can be derived from a reading of
exemplary claim 10, which is reproduced below.
10. Microprocessor system for safety-critical control operations,
comprising:
a plurality of central processing units which are connected, by way
of separate bus systems, to read-only memories and random-access
memories that also have memory locations for test data, wherein said
plurality of central processing units are further connected to input and
output units and to comparators which check the output data or output
signals of the central processing units for correlation, wherein the central
processing units execute the same program and communicate with each
other by way of the bus systems, and wherein the bus systems are
interconnected by bypasses which enable the central processing units to
jointly read and process the existing data, including the test data and
commands,
redundant periphery units into at least two complete control signal
circuits and are interconnected in such a manner that, upon failure of a
central processing unit or associated components, the faulty central unit
can be identified by a majority decision in an identification stage, and an
emergency operation function is maintained, wherein in the emergency
operation function, redundant data processing and comparison of the data
processing results for correlation is maintained and non-correlation or the
occurrence of differences between the data processing results or
intermediate results is signalled, and wherein a delivery of output signals
or control signals by the inclusion of or as a function of the faulty system
or the faulty central unit is prevented.
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