Appeal No. 2002-1187
Application No. 09/403,115
1362,1369, 47 USPQ2d 1523, 1529 (Fed. Cir. 1998). Therefore, we look to the
language of independent claim 10 which recites “into at least two complete control
signal circuits and are interconnected in such a manner that, upon failure of a central
processing unit or associated components, the faulty central unit can be identified by a
majority decision in an identification stage, and an emergency operation function is
maintained . . . .” Appellant argues that the Giers references do not teach the use of an
identification stage for identifying the faulty central processing unit. (See brief at page
7.) Appellant argues that Giers does not require the identification stage because these
references teach only two microcomputers (whereas the present invention uses two
complete and one incomplete computer system). We agree with appellant that there is
no teaching or suggestion of the use of an identification stage as claimed in Giers ‘434
and Giers ‘082. Nor do we find a teaching or suggestion in Smith (Smith article or
Smith ‘347) of the use of an identification stage as claimed in independent claim 10.
We agree with appellant that the use of three complete computation devices in Smith
are more directed to the removal of the faulty device and not to the identification and
continued emergency operation of the remaining system. (See brief at page 7.)
Appellants argue that there is no motivation to modify the teachings of Giers to
add a third data processing system that cooperates with the second incomplete data
processing system and the first complete data processing system as in the present
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