Ex Parte CHIANG et al - Page 2




             Appeal No. 2003-1240                                                                               
             Application No. 09/304,964                                                                         

                                                BACKGROUND                                                      
                   The invention is directed to a mechanism for allocating time slots for processing            
             queues from various ports of a communication switch.  Claim 2 is reproduced below.                 
                   2.     A multiport data communication system for switching data packets                      
                   between ports, the data communication system comprising:                                     
                          a plurality of receive ports for receiving data packets,                              
                          a decision making engine responsive to the received data packets for                  
                   controlling transmission of the received data packets to at least one selected               
                   transmit port,                                                                               
                          the decision making engine including:                                                 
                          a plurality of queuing devices corresponding to the plurality of the receive          
                   ports for queuing data blocks representing the data packets received by the                  
                   corresponding receive ports,                                                                 
                          logic circuitry for receiving the data blocks from the plurality of queuing           
                   devices in successive time slots to identify the at least one selected transmit port         
                   for each data packet, and                                                                    
                          a scheduler interacting with the plurality of queuing devices for                     
                   dynamically allocating each of the time slots to one of the plurality of queuing             
                   devices in accordance with data traffic at the corresponding receive ports,                  
                          wherein the scheduler is configured to receive a request for a time slot              
                   from a queuing device of the plurality of queuing devices when the queuing                   
                   device holds data to be processed by the logic circuitry.                                    
                   The examiner relies on the following reference:                                              
             Wu et al. (Wu)                         5,771,234                  Jun. 23, 1998                    
                                                                        (filed Dec.  6, 1995)                   
                   Claims 2-11 and 13-18 stand rejected under 35 U.S.C. § 102 as being                          
             anticipated by Wu.                                                                                 
                                                      -2-                                                       





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