Ex Parte Takasu - Page 2




             Appeal No. 2003-2176                                                                                 
             Application No. 09/778,460                                                                           
                                              THE INVENTION                                                       
                     Appellant’s claimed invention is directed to a method of manufacturing a                     
              semiconductor device.  Representative semiconductor devices include voltage                         
              regulators and voltage detectors.  (Specification, p. 5).  Claims 4 and 7 are                       
              illustrative:                                                                                       
                     4.   A method of manufacturing a semiconductor device, comprising                            
                     the steps of:                                                                                
                     forming an NMOS transistor having source and drain regions on a                              
                     semiconductor substrate;                                                                     
                     forming a PMOS transistor having source and drain regions on the                             
                     semiconductor substrate; and                                                                 
                     combining together an N-type thin film resistor having a low                                 
                     resistance region and a P-type thin film resistor having a low                               
                     resistance region to form a semiconductor thin film resistor unit;                           
                     wherein the low resistance region of the N-type thin film resistor of the                    
                     semiconductor thin film resistor unit is formed simultaneously with the                      
                     source and drain regions of the NMOS transistor; and                                         
                     wherein the low resistance region of the P-type thin film resistor of the                    
                     semiconductor thin film resistor unit is formed simultaneously with the                      
                     source and drain regions of the PMOS transistor.                                             
                     7.   A method of manufacturing a semiconductor device, comprising                            
                     the steps of:                                                                                
                     forming an NMOS transistor having source and drain regions on a                              
                     semiconductor substrate;                                                                     
                     forming a PMOS transistor having source and drain regions on the                             
                     semiconductor substrate; and                                                                 
                     forming on the semiconductor substrate a bleeder resistance circuit                          
                     having a plurality of semiconductor thin film resistor units each                            
                     formed by combining together an N-type thin film resistor having a                           
                     low resistance region and a P-type thin film resistor having a low                           
                     resistance region.                                                                           


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