Ex Parte PAN et al - Page 4



          Appeal No. 2004-0574                                                        
          Serial No. 09/259,145                                                       
          doped silicon thin film (103) and is formed on both sides of a              
          silicon substrate (101) (col. 6, lines 56-60).  The gettering               
          layer is covered on both sides of the substrate with a protective           
          silicon nitride film (104) (col. 7, lines 27-31; figure 11).                
          Koike teaches that “[t]he silicon thin film to which an impurity            
          was added, and the silicon nitride film 104 are formed generally            
          by a reduced pressure CVD [chemical vapor deposition] method, and           
          therefore these films are deposited on the reverse surface of the           
          silicon substrate 101” (col. 6, line 65 - col. 7, line 2).                  
               The examiner argues that Koike teaches that the silicon                
          nitride film unavoidably forms on the reverse surface of the                
          substrate, and that “[t]herefore, in view of this teaching of               
          Koike, the silicon nitride material formed in Tada, col. 6,                 
          lines 30-31, will also form on the bottom surface of the                    
          substrate” (answer, page 4).                                                
               Koike teaches that reduced pressure CVD forms his silicon              
          nitride film on both surfaces of the substrate.  This apparently            
          occurs because in that method the substrates are held in a wafer            
          boat such that both substrate surfaces are exposed to the film-             
          forming gas.1 As of Tada’ filing date, however, it was known in             

               1 See Stanley Wolf and Richard N. Tauber, 1 Silicon                    
          Processing for the VLSI Era 174-75 (Lattice Press 2000).  A copy            
          of the cited portions of this reference is provided to the                  
          appellants with this decision.                                              
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