Appeal No. 2004-2120 3
Application No. 09/987,566
OPINION
We have carefully considered the entire record before us, and we will reverse the
anticipation rejection of claims 19 and 20.
Anticipation is established when a single prior art reference discloses, expressly or
under the principles of inherency, each and every element of the claimed invention. RCA
Corp. v. Applied Digital Data Systems, Inc., 730 F.2d 1440, 1444, 221 USPQ 385, 388
(Fed. Cir. 1984).
The examiner is of the opinion (final rejection, 2 and 3) that the comparator circuit
37 in Bion (Figures 11 and 12; column 8, lines 45 through 56) discloses all of the circuit
elements set forth in claims 19 and 20. Appellant argues throughout the briefs that Bion
fails to disclose the limitations of “said reference voltage determining a voltage level of an
internal voltage generated from said power supply voltage,” and “a buffer circuit for
buffering said difference signal for generating a binary level detection signal indicating
whether said first voltage is higher than said second voltage.” In response, the examiner
contends that the voltage input on one of the inputs to the comparator 37 functions as a
reference voltage to the power supply voltage input (Vcc) on the other input to the
comparator (answer, page 6), and that the buffer 44 will provide a binary indication
(answer, pages 6 and 7).
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