Appeal No. 2005-0160 Page 3
Application No. 10/352,265
The present invention is a method for invalidating cache entries in memory. The
method includes steps of invalidating a cache entry: (1) using a cache entry ID in
response to a process requesting the invalidation; (2) in response to a change in data
in another memory represented by a data ID associated with a cache entry; and (3)
responsive to a presence of time limit for the cache entry expiring.
The rejection in this case is made pursuant to 35 U.S.C. § 102(b). We initially
note that to support a rejection of a claim under 35 U.S.C. § 102(b), it must be shown
that each element of the claim is found, either expressly described or under principles of
inherency, in a single prior art reference. See Kalman v. Kimberly-Clark Corp., 713
F.2d 760, 772, 218 USPQ 781, 789 (Fed. Cir. 1983), cert. denied, 465 U.S. 1026
(1984).
The examiner is of the view that the Barbara reference discloses each and every
element of the claimed subject matter. The examiner finds:
invalidating a cache entry in response to an invalidation signal, by
teaching in column 1, lines 33-45, an XI (cross invalidate) signal and
messages sent to invalidate data in a cache;
requesting an invalidation of a cache entry using a cache entry ID,
by teaching in column 8, lines 30-32, of determining if the address (entry
identifier) of the datum is listed in the invalidation report in order to mark
the datum as invalid;
invalidating the cache entry in response to a change in data in
another memory represented by a data ID, by teaching in column 4, lines
11-32, the invalidation reports including information identifying which data
values have been updated (data changed) [answer, page 3].
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