Appeal No. 2005-0973
Application No. 09/740,669
While the examiner asserts that a FIFO does not allow for
“shifting or sorting,” a FIFO does, indeed, allow for shifting.
Clearly, as a new piece of data enters the FIFO device, all other
data is shifted over, as the first entered data is shifted out.
For example, if one has a full four-bit FIFO device, such that
cells comprise 0-1-1-0 and a new piece of data is input, say 1,
then the 0 gets shifted out (it was the first in so it is the
first out) and the new data is now 1-0-1-1, comprising a “shift.”
Thus, in our view, the examiner has not clearly demonstrated that
the subject matter of claim 9 is totally incapable of achieving
any useful result.
Accordingly, we will not sustain the rejection of claim 9
under 35 U.S.C. § 101.
Finally, we turn to the rejection of claims 1-4, 10-13, and
19-24 under 35 U.S.C. § 103.
With regard to independent claim 1, it is the examiner’s
position that Lee teaches a shift structure having a plurality of
entries, and a comparison logic circuit to sort the entries based
on their respective weights (abstract/Figure 2). The examiner
acknowledges that Lee does not teach the plurality of entries
having a plurality of fields, or that the entries are DMA
channels. However, the examiner turns to Bass for an alleged
6
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 Next
Last modified: November 3, 2007