Appeal No. 2005-1270 12
Application No. 09/798,169
using the service processor 30. Even so, processors 1 and 2, as depicted in Nota’s
Figure 1, are separate and distinct from the main storage and the fault data is still
disclosed as being stored in the main storage. So even if processors 1 and 2 are to be
used instead of service processor 30, the fault data is still not saved in a power
independent memory of the service processor 30 or in a power independent memory of
processors 1 and 2. Therefore, the instant claimed subject matter is still not taught or
suggested by Nota.
Accordingly, we will not sustain the rejection of claims 1-39 under 35 U.S.C. §103
over Nota, in view of well known non-volatile memories.
Finally, we turn to the rejection of claims 15-17 under 35 U.S.C. §103 over Faulk
in view of firmware.
It is the examiner’s position that Figure 1 of Faulk discloses a bus system, 51-56,
a communication unit, as claimed, as per column 2, line 61 et seq., and column 3, line
57 et seq., a service processor comprising the combination of processor 11 and error
log 12, a power independent memory in the service processor (column 3, line 65,
indicates that error log may be a non-volatile memory), and a host processor, citing
column 3, line 57 et seq.
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