Appeal No. 2005-1869 Application No. 09/902,051 drive system for reading and writing information on a disk, comprising a head to read/write information on the disk, a preamplifier to amplify the information (identifying Figure 3, element 100 for this teaching), and a read channel to process the amplified information, wherein the read channel includes the offset correction circuit to correct DC offset in accordance with a data rate (identifying Figure 3, and “the remainder of 23" for such a teaching). See page 2 of the answer. Appellants’ arguments, in toto, comprises the following, at pages 5-6 of the brief: ...Patti does not disclose or suggest the presently claimed invention including a filter circuit to respond to the thermal asperity signal in accordance with the data rate. The Examiner alleges that Patti discloses an offset correction circuit to correct DC offset in accordance with a data rate referring to Figure 3 element 102, Figure 2a, and column 6, lines 51-56. Notwithstanding the allegations of the Examiner, Patti discloses at column 6, lines 51-56 that the programmed resistances of the variable resistance circuit 132 are selected to achieve the cutoff frequencies for the filter 112. The programmable thermal asperity recovery circuit 132 provides flexibility allowing utilization in read channels having potentially different or varying characteristics (citing different data rates, different causes for the thermal interference, etc.). The resistance circuit 132 does not respond to data rates. 3Page: Previous 1 2 3 4 5 6 7 8 9 NextLast modified: November 3, 2007