Appeal No. 2005-1894
Application No. 10/209,004
3) claims 8 and 11 (brief, page 4). We therefore limit our
discussion to one claim in each group, i.e., claims 2, 7 and 8.
See In re Ochiai, 71 F.3d 1565, 1566 n.2, 37 USPQ2d 1127, 1129
n.2 (Fed. Cir. 1995); 37 CFR § 1.192(c)(7)(1997).
Claim 1
Sandhu discloses a method for forming a storage node
electrode of a capacitor in a dynamic random access memory (DRAM)
device, comprising forming an insulating layer (40; figure 3),
forming a contact (65) in the insulating layer (figure 5),
forming an electrode layer (85) on the insulating layer and the
contact (figure 11A), and etching the electrode layer using a dry
etch (col. 6, lines 60-64). Sandhu does not disclose etching the
electrode layer using a wet etch to form the electrode into a
nodular shape.
Hosaka etches the lower electrode of a nonvolatile memory or
DRAM using a dry etch and then a wet etch to remove the surface
roughness and distortions on the lower electrode and to round the
corner portions of the lower electrode’s side surface, thereby
preventing degradation of the quality of an insulating film
formed on the lower electrode and obtaining good electrical
characteristics (page 3).
3
Page: Previous 1 2 3 4 5 6 7 8 9 10 Next
Last modified: November 3, 2007