Appeal No. 2005-0826
Application No. 09/989,563
thus appears to consist of resistor 301 connected with diodes 305, 307, 309, 311, and
313. Two capacitors (315, 317) are also connected to node 319, but are not said to
contribute to the clamping function. The capacitors act as buffers to prevent rapid
change of the voltage at node 319. Figure 4A depicts a clamp circuit with a fuse control
(bypass device) 400. (Spec. ¶ 41.)
Furumochi at Figure 5 depicts resistance RL connected with diode-configured
transistors (i.e., diodes) T1 through T4. Furumochi’s invention is an improvement over
the prior art circuit shown in Figure 1 and further described at column 5, lines 18
through 54. In the prior art, selected output voltages were dependent of the thresholds
VTH of selected diode-configured transistors. Due to variability in manufacturing of the
transistors serving as diodes, only a “rough” adjustment of output voltage was possible.
We note that the prior art with respect to Furumochi also contained bypass devices TS1
through TS3, for selecting diodes and thus determining the output voltage of the circuit.
Furumochi uses a “bias variable means” 11 (Fig. 3) to selectively bias the back-
gate of transistors, effecting control of the transistor threshold voltages. Control of the
voltage output of the bias variable means, in turn, is effected by a ROM fuse circuit 14
that may be programmed for generating particular external control signals. Col. 5, l. 55
- col. 7, l. 10.
In Furumochi’s Figure 5, the switching element SW0 and selection switching
circuit SW1-SW3 constitute an illustrative example of a bias variable means. The
switching element SW0 is an example of the switching element 11A, shown in Figure 3.
-5-
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