Ex Parte Sher et al - Page 6




              Appeal No. 2005-0826                                                                                      
              Application No. 09/989,563                                                                                

              Switching element SW0 is composed of a field effect transistor with its gate connected                    
              to the ROM fuse circuit 14.  Col. 7, ll. 39-50.  An equivalent circuit is depicted in Figure              
              6.  Col. 5, ll. 30-35.                                                                                    
                     Programming of the ROM fuse circuit 14 is described at column 9, line 12 et seq.                   
              of the reference.  Various examples are provided in Figure 7A through Figure 8D,                          
              showing equivalent circuits, responsive to how the ROM fuse circuit may be                                
              programmed by melting and disconnecting particular fuse elements.  Figure 8A                              
              represents the bypassing of diode T4 by programming SW0 as “ON.”                                          
                     Different output voltages for the circuit of Figure 5 are thus effected by controlling             
              the total threshold voltages of the diodes, the sum of which sets the circuit’s constant                  
              output voltage VDD.  In appellants’ “clamp circuit” as described in the specification, the                
              threshold voltages of the diodes are not controlled individually.  However, the relevant                  
              circuit in Furumochi appears to operate on the same principle as appellants’ “clamp                       
              circuit.”  The instant clamp circuit operates to limit the voltage at (output) node 319                   
              (instant Fig. 3A) corresponding to the summation of the threshold voltages of the                         
              diodes.  In Furumochi’s circuit of Figure 5, the output voltage VDD appears to be                         
              determined by the sum of the threshold voltages of the diodes.                                            
                     The record thus supports the examiner’s finding that Furumochi describes a                         
              clamp circuit having a clamping threshold within the meaning of instant claim 1.                          
              Appellants may hold that what appellants consider to be a “clamp circuit” might operate                   
              differently from the circuit described by Furumochi when placed in some other                             
                                                          -6-                                                           





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