Appeal No. 2006-0721 Page 8
Application No. 10/113,458
Here, "[t]he purpose of th[e] [MROMB Note] is to provide to system design
engineers the design considerations to take into account when designing Modular RAID
on Motherboard (MROMB) solutions using the Intel® 80303 I/O Processor (80303
IOP)." (§ 1.0 (internal footnote omitted.)) The reference explains that "[t]he 80303 IOP
communicates with the I/O controller via the 80303 IOP's primary PCI bus which is
visible to the host system" (§ 2.1.) Such communication enables "the 80303 IOP . . . to
setup the necessary resources in host memory for the I/O controller," (§ 3.2, ¶ 2), and
"to reserve space for the I/O controller within the BAR (Base Address Register) of the
80303 IOP," (§ 4.1, ¶ 2); "[t]he IOP configures the I/O controller to respond to PCI
transactions within this address range." (Id.)
"[I]t is possible for the host to relocate the base address originally assigned to
the IOP BAR." (Id.) We agree with the examiner's finding that reallocating such
address resources to the IOP teaches the claim's change in resources allocated to a
first device. Such a reallocation, explains the MROMB "require[s] the IOP to . . .
reprogram the I/O controller accordingly," (id.), i.e., to change the space reserved for
the I/O controller within the IOP's relocated BAR so that the I/O controller can respond
to PCI transactions within the relocated address range. We further agree with the
examiner's finding that the IOP's changing of the space reserved for the I/O controller
teaches the claim's first device's changing resources allocated to a second device in
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