Appeal No. 2006-1107
Application No. 09/382,442
the hydrogen isotope into the semiconductor layer.
Representative claim 1 is reproduced as follows:
1. A method for reducing random single bit data
loss in a FLASH memory circuit having a programming
operation and an erase operation, comprising:
providing a semiconductor layer having a surface;
heating the layer in an atmosphere comprising a
Hydrogen isotope wherein the Hydrogen isotope is
incorporated into the layer; and
fabricating a memory circuit having a programming
operation and an erase operation, comprising single bit
data using the semiconductor layer, the fabricating
comprising fabricating a gate region in the layer;
treating a portion of the surface to form a thin layer of
insulator film adjacent to the gate region and under the
gate region; and heating the thin layer in an atmosphere
comprising Hydrogen isotope, wherein single bit data loss
is reduced and wherein random single bit data loss is
prevented in both the programming operation and the erase
operation.
The examiner relies on the following references:
Sheu 4,840,917 Jun. 20, 1989
Nakanishi 5,145,797 Sep. 08, 1992
Nakajima et al. (Nakajima) 5,397,724 Mar. 14, 1995
Lisenker et al. (Lisenker) WO 94/19829 Sep. 01, 1994
(published World Int. Prop. Org. Patent Application)
The admitted prior art.
Claims 1, 2 and 4-14 stand rejected under 35 U.S.C.
§ 103(a). As evidence of obviousness the examiner offers
Nakanishi in view of Lisenker and the admitted prior art with
2
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