Appeal No. 2006-1204
Application No. 10/379,006
impedance control circuit (310), which is part of a feedback
control loop that also includes a buffer (330) and an amplifier
(360). We also find that Mooney teaches that the impedance
control circuit (310) uses the output signal of the amplifier
(360) to determine whether to increase or decrease the impedance
of the buffer (330) to match it with the impedance of the
external load (340), as well as to control the slew rate of
another buffer (320). One of ordinary skill in the art would have
duly recognized that Mooney’s teaching of only one external clock
signal to drive the impedance control circuit does not amount to
synchronizing signals of the internal and external clocks.
Further, the ordinarily skilled artisan would have duly
recognized that Mooney’s teaching of increasing or decreasing the
impedance of the buffer does not amount to the claimed limitation
of selecting one of the plurality of impedances from the circuit
driver. Consequently, we find error in the Examiner’s stated
position, which concludes that Mooney teaches the claimed
limitation of a synchronous circuit capable of providing a signal
indicative of an impedance mismatch between the driver circuit
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