Appeal 2006-2328
Application 10/131,049
teach "said microcomputer generating . . . reference . . . vertical synchronous
signals when at least one synchronous signal is not detected from said
computer" (Brief at 8) and, therefore, also fails to teach "said microcomputer
providing . . . said . . . reference . . . vertical synchronous signals to said
synchronous signal processor" as required by claim 58 (Reply Brief at 14).
It is argued that the Examiner's reasoning in the Advisory Action that it was
notoriously well known in the art to provide reference horizontal and vertical
synchronizing signals is untenable because no art was applied and the Final
Rejection is based only on Arai (Brief at 9).
The Examiner repeats that the synchronizing signal processing
circuit 201 continues to generate separated horizontal (HD2) and vertical
(VD2) synchronizing signals even when the horizontal synchronizing signal
input is not detected (Answer at 10), which implies that the Examiner finds
HD2 and VD2 to be reference horizontal and vertical sync signals. The
Examiner repeats the Advisory Action reasoning that it would have been
obvious to modify Arai to include vertical countdown circuitry to protect the
vertical signal from noise and/or corruption (Answer at 19-21).
Appellant replies that Arai does not check the inputted synchronous
signals to detect the absence of inputted horizontal synchronous signals, but
only detects a missing horizontal synchronous signal HD2' (Reply Brief
at 12-13). Appellant also replies that Arai is not concerned with omission of
the vertical synchronizing signal VD2 (id. at 15). It is argued that Arai makes
no mention of noise as a reason for the omitted horizontal synchronizing
- 16 -
Page: Previous 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Next
Last modified: September 9, 2013