Appeal 2007-1509
Application 09/427,114
Appellants’ disclosed invention relates to image processing in which a
plurality of processors perform a series of processings on input image data in
a prescribed order with the processings being executed asynchronously by
the plurality of processors. A shared memory is utilized to store image pixel
data to be processed and a state flag is used to represent the state of
processing of the data for each pixel. (Specification 3-4).
Claim 1 is illustrative of the invention and reads as follows:
1. A data processing system comprising:
a plurality of processors for executing a series of different types of
processing functions on data to be processed in a prescribed order, each
processor executing a processing function different from one another and
said data to be processed being image data that consists of a plurality of
pixel data; and
a memory for storing said data to be processed in association with
state information to represent the processing to be performed next for each
pixel data of said data to be processed, wherein
said processing functions are asynchronously executed on said data to
be processed by said plurality of processors, one processing is executed on
each pixel data by one of the processors at a time and said plurality of
processors share said memory.
The Examiner relies on the following prior art references to show
unpatentability:
Orimo US 5,630,135 May 13, 1997
Charles US 5,790,842 Aug. 4, 1998
Free On-Line Dictionary of Computing (FOLDOC), October 21, 1994, web
page available at http//foldoc.doc.ic.ac.uk/foldoc.cgi?query=image, (October
1994).
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