Appeal 2007-2035
Application 09/848,846
The Examiner's rejection indicates that Lowrey teaches a
semiconductor processing method with every claimed feature including
conducting a halo implant to devices formed over a substrate that is
sufficient to impart two different threshold voltages to two different
respective threshold voltages. According to the Examiner, Lowrey teaches
every claimed feature except for three different devices having three
different threshold voltages. The Examiner, however, concludes that such a
feature merely duplicates parts and therefore is an obvious variation of
Lowrey’s teachings (Answer 3-4).
Appellant argues that the Examiner has simply not provided any
reason or evidence as to why the skilled artisan would have included three
different transistors with three different threshold voltages in Lowrey rather
than two transistors (Br. 4-6).
The Examiner responds that it would have been obvious to form a
third transistor with a third threshold voltage because DRAM devices may
include hundreds of transistors, such as read-out transistors, which would
have a third threshold voltage different from the peripheral and access
transistors (Answer 6).
The sole issue before us, then, is whether it would have been obvious
to the skilled artisan at the time of the invention to form a third device with a
third threshold voltage in Lowrey via the claimed processing method. For
the following reasons, we answer this question “no.”
Lowrey discloses a CMOS integrated circuit (e.g., a DRAM) where a
first layer of polysilicon 45 is deposited on a wafer 11 that forms transistor
gates (Lowrey, col. 6, ll. 44-48; Fig. 6). The polysilicon 45 is patterned only
in the n channel areas which are over p type material. A halo implant (or
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