Appeal 2007-2219
Application 10/035,587
STATEMENT OF CASE
Appellant appeals under 35 U.S.C. § 134 from a final rejection of
claims 1-3 and 5-47. We have jurisdiction under 35 U.S.C. § 6(b).
Appellant invented systems and methods for accumulating floating
point status information associated with a plurality of floating point values.
(Specification [002]).
Representative independent claim 1 under appeal reads as follows:
1. A flag combining circuit, comprising:
an analysis circuit that receives a plurality of operands each of
which having encoded status flag information, the analysis circuit
being operative to analyze the plurality of operands and to provide an
indication of one or more predetermined formats in which the
plurality of operands are represented; and
a result assembler that receives the indication from the analysis
circuit and assembles an accumulated result that represents a value
and combines the encoded status flag information from each of the
plurality of operands.
The Examiner rejected claims 1-3 and 5-47 under 35 U.S.C. § 102(b).
The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Huang US 5,995,991 Nov. 30, 1999
The Examiner also rejected claims 1-3 and 5-47 under 35 U.S.C.
§ 103(a).
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