Appeal No. 95-3916 Application 08/008,292 error flag memory means for storing the set of error flags of said subsequent digital information signal on a code block basis; control means for controlling a read/write operation to said memory means and said error flag memory means; and check means for comparing a set of check information codes of said one digital information signal with a set of check information codes of said subsequent digital information signal both stored in said memory means, on a check information code basis; wherein said control means writes correct code blocks and corrected code blocks after error correction of said one digital information signal at respective memory locations of said memory means as well as the check information codes thereof in view of the set of error flags stored in said error flag memory means for said one digital information signal; said control means then writes correct code blocks and corrected code blocks after error correction of said subsequent digital information signal at respective memory location of said memory means as well as the check information codes thereof in view of the set of error flags stored in said error flag memory means for said subsequent digital information signal, and said control means sets error flags for same code blocks of said one and subsequent digital information signal in said error flag memory means, where the error flags for both the same code blocks stored in said error flag memory means indicate that the same code blocks are correct or corrected code blocks, but a comparison result by said check means indicates that the check information codes of both the same code blocks do not coincide with each other. The references relied on by the examiner are: Takagi et al. (Takagi) 4,742,517 May 3, 1988 Preissler 4,918,694 Apr. 17, 1990 Claims 26 through 28 and 30 through 32 stand rejected under 35 U.S.C. § 103 as being unpatentable over Preissler. 3Page: Previous 1 2 3 4 5 6 7 8 NextLast modified: November 3, 2007