Appeal No. 95-3916
Application 08/008,292
check information codes is inherent in the operation of
Preissler's comparison. This is because when data
words are compared by comparison circuit of Preissler,
the check words (which added to the data words) are
compared as well.
In response to the examiner's contentions concerning the
teachings of Preissler, appellants argue (Reply Brief, pages 4 to
5) that
[i]n column 3, lines 39-64 of Preissler, Preissler
specifically teaches that the read control circuit 3
reads out data of a first and a second recording in a
time multiplex manner from storage 2. Preissler
further teaches that at one time four bits of audio
data and one error flag bit is read out for each of the
first and second recordings and supplied to the
registers 6, 7 and 4, 5 respectively. In Preissler
based on clocking provided by the control circuit 3,
ten bits of data (four bits audio data and one bit
error flag for each of the first and second recordings)
are made available from the combination of registers 5
and 7 with the two, four bit parallel audio data
portions being supplied to the comparison circuit 8 and
the two parallel one bit error flag data being supplied
to the OR gate 9. The comparison circuit 8 compares
the two parallel four bit audio data so as to output a
signal to OR gates 10 and 11. The two parallel one bit
flag data provided to the OR gate 9 causes the OR gate
9 to output a signal which enables the operation of the
comparison circuit 8 when the error flag has been set
in any one of the two parallel one bit error flag data.
Preissler clearly teaches that the comparison circuit 8
is active (enabled) only when neither of the audio data
portions is accompanied by an error flag.
Appellants' assessment of the teachings of Preissler is
correct. Thus, we agree with appellants (Reply Brief, pages 5
and 6) that the comparator 8 in Preissler merely compares audio
5
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Last modified: November 3, 2007