Ex parte MONTI et al. - Page 2

              Appeal No. 95-3917                                                                                                                          
              Application 07/861,144                                                                                                                      

                                                         DECISION ON APPEAL                                                                               

                       This is a decision on appeal under 35 U.S.C.  134 from the                                                                        

              final rejection of claims 1-22, all of the claims pending in the                                                                            

              application.  The amendment filed with the appeal brief as                                                                                  

              Appendix B has not been entered (Examiner's Answer, page 1).                                                                                

                       The invention is directed to an integrated circuit which includes a network of passive elements (e.g.,                             

              resistors or capacitors) that can be selectively connected to one another between first and second nodes                                    

              of the network in either a parallel or series arrangement.  A plurality of logic gates controlled by a decoder                              

              are used to selectively include or exclude each passive element from contributing to the value of the passive                               

              component represented by the equivalent circuit of the network between the first and second nodes.                                          

                       Claim 1 is reproduced below.                                                                                                       

                                1.  An integrated circuit having a trimmable passive circuit component adjustable to achieve                              
                       a precise target value, comprising:                                                                                                

                                a decoder having N inputs and M outputs, wherein M is related to and exceeds N, said                                      
                       inputs and outputs each having first and second logic states, the logic states of the outputs                                      
                       corresponding to coded logic states on the inputs; and                                                                             

                                a network connected to the outputs of the decoder and having a first node and a second                                    
                       node defining the terminals of the passive circuit component within the integrated circuit, the                                    
                       network including a plurality of interconnected passive elements and a plurality of corresponding                                  
                       logic gates, each logic gate having a control terminal for setting the logic gate to either a conductive                           
                       state or a nonconductive state, each control terminal being coupled to and controlled by one of the                                
                       M outputs of the decoder, each gate being connected to its corresponding passive element for                                       
                       selectively including or excluding the passive element from a circuit path between the first and                                   

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