Ex parte NAKAGAWA - Page 4




          Appeal No. 95-3889                                                          
          Application 08/070,296                                                      


          (Fed. Cir. 1990). With respect to independent claims 1 and 6,               
          appellant is correct that Loo does not disclose a multi-port RAM.           
          With respect to the invention of Loo, at column 4, lines 39-42, it          
          is disclosed that RAM memory 14 acts as a three-port memory. At             
          column 1, lines 54-56, under SUMMARY OF THE INVENTION, Loo refers           
          to his memory as a single-port memory. The fact that Loo’s single-          
          port RAM can be made to act like a multi-port RAM does not make it          
          a multi-port RAM. Structurally, it is still a single-port RAM.              
          Still further with respect to claims 1 and 6, appellant is                  
          correct that Loo does not disclose simultaneous read and write              
          operations (claim 1) or that such operations occur at the same              
          time (claim 6). Although phases of instructions N, N+1 and N+2              
          overlap and are simultaneous, as illustrated in Figure 3 of Loo,            
          and each phase includes both read and write functions, at any               
          given time Loo is performing simultaneous write operations or               
          simultaneous read operations. There are no simultaneous read and            
          write operations. This is illustrated by the figure attached to             
          appellant’s reply brief, which figure we acknowledge as an                  
          accurate representation of a combination of Loo’s Figures 3 and 4.          
          The attached figure shows that the read and write operations to             
          the RAM occur at different times.                                           

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