Appeal No. 95-4736
Application 08/084,801
1. An apparatus for replacing a segment of instructions for a processor, the
processor responsive to instructions to change data, comprising:
a memory system coupled to the processor having a set of memory locations to supply a
sequence of instructions stored in the set of memory locations to the processor;
a controller, coupled to the memory system and the processor, and having an input, that is
responsive to a command on the input to disable the processor from changing data in response to
instructions from a particular subset of the set of memory locations which stores the segment of
instructions, the particular subset including more than one memory location; and
a memory interface, coupled to the memory system and to the controller, to receive and
write new instructions to the particular subset to replace the segment of instructions.
14. A signal processing system comprising:
a real time processor to execute a plurality of segments of instructions;
an instruction memory coupled to the real time processor having a plurality of memory
locations with respective addresses, to store the plurality of segments of instructions in respective
groups of addresses and output a sequence of instructions to the real time processor in response
to addresses;
a sequencer coupled to the instruction memory operative to provide a sequence of
addresses identifying the sequence of instructions in the instruction memory;
a controller, coupled to real time processor, the instruction memory and the sequencer,
operative, in response to a command, to override execution of a particular segment of instructions
stored in a particular group of addresses in the instruction memory, the particular segment
including more than one instruction; and
a host interface coupled to the instruction memory and the controller for receiving and
writing new instructions to the instruction memory in the particular group of addresses to replace
the particular segment of instructions.
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