Appeal No. 96-0410
Application 08/161,015
We reverse the outstanding rejections of all the claims on
appeal.
It appears that the examiner has not come to grips with the
requirement of the first stated step of independent claim 1 on
appeal, that of disposing “flat solder pads” on the integrated
circuit. We find that no reference relied upon by the examiner
in the first stated rejection teaches such a feature,
notwithstanding the examiner’s attempt to reformulate the
assessment of the prior art at page 5 of the answer.
LeParquier’s integrated circuit component connection pads P in
his prior art Figs. 1 to 3 are not stated in the reference to be
flat solder pads as required by independent claim 1 on appeal.
The discussion at the top of col. 3 of the reference indicates
that a separate solder projection or bump 1 is formed on this pad
P, as depicted in prior art Fig. 2 of LeParquier, both of which
appear in this figure to maintain their separate physical
integrity. Therefore, the formation of the solder bump 1 does
not appear to occur from any solder already present in the pad P
on the chip IC. Collectively taken, however, the combination of
the solder bump 1 and the pad P may be considered a solder pad
but it is not stated to be flat and it is not probed directly,
whereas the probing actually occurs on the tape 4 at tape testing
3
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