Appeal No. 96-0523
Application 07/910,763
cross as recited in claim 7 and it would have been obvious to
provide a second material at the point where the grids cross
and supporting one of the grids in view of the teaching in
figure 7 of Stopper of insulating cross-overs between padlines
and netlines (col. 4, lines 20-29). The rejection of claim 7
is sustained.
Claim 8 recites a "semiconductor wafer including a test
arrangement for testing a plurality of semiconductor chips" in
the preamble. The "test arrangement" is the arrangement of
structure in the body of claim 8, which would have been
obvious over Stopper for the reasons discussed supra. Claim 8
recites that the intended use of the structure is "so that
each of said semiconductor chips can be simultaneously
supplied with a test signal." The structure of the power grid
in Stopper is manifestly capable of allowing this intended
use. We observe that no test signal is positively recited.
In any case, however, the term "test signal" is broad enough
to include the voltage applied to the power grid in Stopper.
Appellant argues that the testing structure can be used after
a "static" burn-in or to apply clock pulses during a "dynamic"
burn-in (Brief, page 10). However, the "test signal" in claim
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