Appeal No. 96-1319
Application 07/934,982
in which the computer is prevented from executing instructions because the computer is
not connected to the existing equipment. This smart memory is directly accessible as a
standard video memory in such existing equipment. Therefore, we sustain the rejection of
the invention as broadly recited in independent claims 1, 11 and 16.
Claims 2 and 3 recite a smart memory having either an external lead or a memory
location “for switching said processor between a smart mode and a standard mode.”
Although the smart memory resulting from the collective teachings of Nicoud, Witt and
Nusinov has a standard operating mode and a smart operating mode, the mode does not
switch the on-chip processor in any manner. The collective teachings merely result in a
smart memory in which the processor is connected or not connected through an external
pin such as pin 2 of Nusinov. There is no suggestion that the processor itself has plural
modes which are switchable in response to mode information. In our view, the connection
or disconnection of the processor through external pin 2 does not teach or suggest a mode
external lead or a mode information memory location for switching the processor between
a smart mode and a standard mode. Therefore, we do not sustain the rejection of claims 2
and 3.
Claims 4 and 5 recite a smart memory having either an external lead or a memory
location “for causing said processor to execute an interrupt task.” The smart memory
resulting from the collective teachings of Nicoud, Witt and Nusinov would have a plurality of
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