Appeal No. 96-1518
Application No. 08/190,244
a gate electrode formed on said channel and insulated
therefrom by said first and/or second insulating layer while
being insulated from said pair of channel stoppers by said
second insulating layer; and
said pair of channel stoppers being electrically
connected to the said source diffusion region to drive said
channel stoppers in synchronism with said gate electrode.
The references relied on by the examiner are:
Sauer 4,603,426 July 29,
1986
Yamada 4,931,850 June 5,
1990
Kimura et al. (Kimura) 4,998,161 Mar. 5,
1991
Claims 2, 4, 5 and 7 through 12 stand rejected under 35
U.S.C. § 103 as being unpatentable over Sauer in view of
Kimura and Yamada.
Reference is made to the brief and the answer for the
respective positions of the appellants and the examiner.
OPINION
The obviousness rejection is reversed.
Appellants and the examiner agree that Sauer merely shows
a conventional charge detector (Figure 1) with load and drive
transistors Q2 and Q3 in a source follower (Brief, page 4;
Answer, page 3).
3
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