Appeal No. 1996-1767 Page 13
Application No. 08/220,410
Giving the claims their broadest reasonable interpretation,
they recite inputting and outputting signals at the same
frequency.
Comparison of Fujii to the claim language evidences that
the reference teaches inputting and outputting signals at the
same frequency. Fujii discloses a digital filter processor
capable of carrying out a spacial filter image process at
increased speeds. Col. 3, ll. 9-11. The processor includes
five processing circuits 11 through 15 that have the same
structure and perform the spacial filter image process. Col.
4, ll. 47-50. In processing circuit 11; image data X11, X12,
X13, X14, and X15 are alternately supplied to flip-flops FF1
and FF2 with the period of a clock signal CK1, which is
generated by a clock signal generator 21. The flip-flops
temporarily store and output the incoming data in synchronism
with the clock signal CK1. The output data successively
supplied from the flip-flop FF1 is supplied to multipliers M1,
M2, and M3 in synchronism with the clock signal CK1. Col. 5,
ll. 1-15.
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