Appeal No. 96-2025
Application 07/860,254
applying a first modulated voltage, to said plurality of
pixels, with a time duration corresponding to a logical value
of a binary code of a plurality of predetermined bits in said
one of the pair of fields; and
inverting the logical value of the binary code of the
plurality of predetermined bits to produce the binary
complement of the logical value of the binary code of the
plurality of predetermined bits and applying the binary
complement as a second modulated voltage, to said plurality of
pixels, in the other of the pair of fields, thereby providing
a symmetrical voltage waveform to said plurality of pixels.
The Examiner relies on the following references:
Kanatani 4,488,150 Dec. 11, 1984
Flegal 4,733,228 Mar. 22, 1988
Inada 4,951,041 Aug. 21, 1990
Claims 1 and 3 through 5 stand rejected under 35 U.S.C.
§ 103 as being unpatentable over Inada in view of Kanatani and
Flegal. Claims 2 and 6 through 9 stand rejected under 35
U.S.C.
§ 103 as being unpatentable over Inada in view of Kanatani.
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