Appeal No. 96-3236
Application 08/295,493
(Filed June 28, 1989)
Westcott et al. (Westcott) 5,151,981 Sept. 29, 1992
(Filed July 13, 1990)
Claims 1 through 8, 10 through 13, 15 through 21, 23, 24, 26, 27, 29 through 54, 56, 57, 59
and 60 stand rejected under 35 U.S.C. § 103 as unpatentable over Danielsen in view of Westcott.
Reference is made to the briefs and answer for the respective positions of appellants and the
examiner.
OPINION
We reverse.
Each and every one of independent claims 1, 17, 26, 37, 50, 59 and 60 requires processors
operating “asynchronously.” The primary reference to Danielsen, while directed to error detection in
multiprocessor systems, makes it very clear that the processors therein are run synchronously. Column
5, lines 52-55 of Danielsen indicates that processor A, its key generator 48 and its lock circuit 50 are
all started “and run in synchronism with each other and with processor B, its key generator 62, and its
lock circuit 64.” Even in the situation where two clocks are employed in the system rather than one
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