Ex parte BELLO et al. - Page 4




               Appeal No. 96-3236                                                                                                      
               Application 08/295,493                                                                                                  


               clock running all operations, Danielsen states (column 7, lines 67-68) that the “two clocks would need                  

               to be synchronized with each other.”                                                                                    



                       Thus, it is clear that while the claims require processors operating asynchronously, the primary                

               reference employed by the examiner to reject those claims discloses a system which operates only in a                   

               synchronous manner.  The examiner does not deny this.                                                                   



                       Rather, the examiner states, that it would have been obvious “to modify Danielsen to                            

               independently clock Danielsen’s processors because one would want to prevent catastrophic failure of                    

               Danielsen’s Anti-Lock Brakes if said one clock fail [sic]” [answer-page 4].  The examiner further states                

               that it would have been obvious “to modify Danielsen to asynchronously (loosely-coupled) operate his                    

               processors because this would add greater reliability to his system” [answer-page 5].                                   



                       The examiner’s rationale, in our view, is based on impermissible hindsight gleaned from                         

               appellants’ own disclosure.  At page 2 of the specification, appellants disclose that a drawback to the                 

               TMR (triple module redundancy) system is that because the modules share a common clock, “clock                          

               failure is devastating to operation of the system.”  They also disclose that while “loose synchronization”              

               between processors is known when using a software data collection and voting technique, the                             


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