Appeal No. 96-3440
Application 08/261,613
a buffer stage comprising an input for connection to a
control circuit and an output;
a pull-up transistor connected between the output and a
power supply voltage source, said pull-up transistor having a
control terminal for rendering said pull-up transistor
conductive when activated;
a gate circuit having an input and an output, the input
of said gate circuit being connected to the control circuit
and the output of said gate circuit being connected to the
control terminal of said pull-up transistor; and
a clamping transistor connected to the output and to the
control terminal of said pull-up transistor at a node located
in the connection between said gate circuit and said pull-up
transistor, said clamping transistor having a control terminal
for connection to the power supply voltage source and having
respective input and output terminals, the input terminal of
said clamping transistor being connected to the node between
said gate circuit and the control terminal of said pull-up
transistor and the output terminal of said clamping transistor
being connected to the output of said buffer stage;
said clamping transistor when conductive maintaining the
control terminal of said pull-up transistor at the output
level of said buffer stage when the output level is higher
than the level of the power supply voltage.
The examiner’s Answer cites admitted prior art and the
following prior art reference:
Tarng 5,280,200 Jan. 18, 1994
OPINION
The claims stand rejected under 35 U.S.C. § 103 as
unpatentable over admitted prior art in view of Tarng.
2
Page: Previous 1 2 3 4 5 6 Next
Last modified: November 3, 2007