Ex parte SHUDO et al. - Page 2









                    This is a decision on appeal from the final                       
          rejection of claims 1 through 6, all claims pending in this                 
          application.             The invention relates to a print head              
          having a plurality of driver ICs.  Each driver IC includes a                
          data input for inputting print data for each dot in series and              
          a shift register being connected to the data input for                      
          transferring input print data in sequence.  The shift register              
          has an output for outputting print data stored at the last bit              
          of the shift register and additional data outputs for                       
          outputting print data stored at an intermediate bit of the                  
          shift register.  The driver ICs are cascaded by using the data              
          output or an additional data output.                                        
                    The additional data output enables the number of                  
          bits of the driver IC to be changed.  For example, if a 96-bit              
          shift register is contained on the IC and an additional data                
          output is provided at the 32nd and 64th bits, the number of                 
          bits of the driver IC can be set to 96, 64, or 32 for use,                  
          depending upon how many dots exist on one print line.  Prior                
          art driver ICs contained shift registers without the                        



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Last modified: November 3, 2007