Appeal No. 1997-0923
Application No. 08/400,414
claims 21 through 25, 27 through 33, 35, 36, 38, 41 through
44, 46 and 47 and also the obviousness rejection of claims 37,
39, and 40.
The examiner asserts that Conners anticipates claim 21.
The examiner states (Final Rejection, page 5):
Col. 31, line 27 et seq. describes the evaluation of
a Boolean expression. Col. 43 line 36 et seq.
describes the evaluation of an expression containing
logical expressions and comparisons ("N2 is
positive" is equivalent to "N2>0"). Conners
discussed "conditional" execution of an operation
(including subsequent Boolean operations) throughout
his specification; for example col. 13, line 63 et
seq. discusses execution of an instruction based on
whether a bit=0 or 1.
In the Answer (page 5), the examiner contends that claim 21 is
no more than the evaluation of "IF (A op C)=B2; THEN R=B1."
The examiner continues, "Since any computer or microprocessor
is comprised of various registers and functional units
internally to its CPU or ALU, and contains instruction
registers, decoders, etc.; a wide variety of machines may
evaluate the above expression" (underlining added for
emphasis). In the Answer (page 6), the examiner further
refers to Conners' statement that
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