Appeal No. 1997-1038
Application 08/077,926
At the outset, we note that the examiner's summary of the invention comment on
page 2 of the answer takes the view that
the first and second gates are respective gates 16b and 16a. However, the specification
as filed has consistently indicated that the claimed first gate comprises gate 16a and the
second gate comprises gate 16b, respectively, just the opposite of the examiner's view.
Note, for example, the summary of the invention at page 4, lines 10 through 18 of the
specification, as well as the showing at least in the first embodiment of Figure 1 and the
description at page 16, lines 5 through 13 of the specification as filed, as argued by
appellant at page 6 of the brief. Therefore, we are in agreement with the appellant's
conclusion at the end of that page of the brief that there is no inconsistency of the language
recited in claim 1 within the claim itself, nor is there any inconsistency with the claim
language and the specification and drawings as filed. Functionally speaking, the noted
first gate of the claim, as well as the first gate of the specification, provides an output of a
logical product, whereas the second gate similarly provides a logical sum.
We reach a similar conclusion with respect to the separate concerns raised by the
examiner as to dependent claim 23, which depends from claim 21, which in turns depends
from independent claim 20. Since claim 20 recites a semiconductor wafer, this is an
indirect reference to the initial disclosure of the embodiment shown in Figure 8 depicting
the recited dicing line 30 and the signal generating means 17, 18 depicted in Figure 10
following the general depiction in Figure 8. The Figures 9 and 10 details indicate clearly
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