Appeal No. 1997-1183
Application No. 08/066,362
Claims 7 and 8 are rejected under 35 U.S.C. § 103 over Micheel, Kawahito and
Kameyama. Claims 7 is rejected as discussed above with respect to claim 4 as set forth
thereto by the Examiner. We apply Micheel as the primary teaching since Micheel clearly
teaches and suggests the use of resonant tunneling diodes (negative differential
resistance devices) in multi-valued logic, as discussed above. Furthermore, we have
included both Kameyama and Kawahito in the combination since both teach various
embodiments of summation logic circuits which a skilled artisan would have realized would
have benefited from the use of negative differential resistance devices in the processing
circuitry. The motivation for the combination of the teachings would have been to further
increase the speed of math processing of Kawahito (figures 4 and 5) and Kameyama
(figure 5 and equations (1) -(6)) by using negative differential resistance devices.
Furthermore, we note that there is a difference between the nomenclature used in the claim
when compared to the references, but also note that they are functionally equivalent in the
mathematical processing and conversion back to base 3 from base 5.
Claim 8 is rejected on the same basis as claim 7 further in view of the teaching of
Kawahito which teaches the use of current states with increments of 0.5. (See
Kawahito at page 336, col. 1 and figure 5.) Therefore, skilled artisans would have been
motivated to use 0.5 as the line to separate the two lowest states.
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