1 Application for patent filed August 27, 1993.
references. In particular, “a second input for receiving a
signal indicative of the equality of previously compared bits
from the first and
second operands; means coupled to the first and second inputs
for generating a signal indicative of the equality of
corresponding portions of the first and second operands, the
corresponding portions comprising the selected bit and the
previously compared bits from the first and second operands”
as recited in claim 14 (emphasis added) has not been shown.
Thus, we will not sustain the 35 U.S.C. § 103 rejection of
independent claim 14, and likewise claims 15, 24 and 32
dependent therefrom and containing the same unmet limitation.
Finally, with regard to independent claim 16,
The Examiner states:
Batcher provides coupling i.e. interconnecting the
processing elements as described in Col. 4, line 20
et seq.; the P register provides routing functions
effectively multi-plexing data sources between the
neighboring processing elements and a local data
source (RAM). In addition, the adder is described
as receiving an input from the shift register, the
output of the A register and an input from the P
register (Col. 6, line 51 et seq.). In effect,
Batcher discloses more structure than applicant,
however, it would have been obvious to one of
ordinary skill in the art at the time the invention
was made that “coupling” may be direct or indirect
1 12
1Application for patent filed August 27, 1993.
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