Appeal No. 97-2877
Application No. 08/334,096
Hunter. On the other hand, Hunter does state (column 5, lines
45 through 49) that “[w]hen the user then inputs the
combination provided by data center 20 into meter 10, . . .
meter 10 will use the combination . . . to verify that valid
register values had been input by the user. . . . Hunter also
discloses (column 5, lines 63 and 64) that “the ascending
register [in non-volatile memory 28] may be reset to zero each
time a valid combination is received.”
Inasmuch as Hunter expressly states that access may be
had to the registers in the non-volatile memory each time a
valid combination is received, the examiner’s conclusion that
Hunter “must first reset the timer and second grant access to
the secured memories” is without any support in the teachings
of Hunter. Accordingly, the 35 U.S.C. § 102(b) rejection of
claims 1 through 5 based on the teachings of Hunter ‘654, and
the
35 U.S.C. § 102(e) rejection of claims 1 through 5 based on
the teachings of Hunter ‘268 are reversed.
7
Page: Previous 1 2 3 4 5 6 7 8 9 Next
Last modified: November 3, 2007