Appeal No. 1997-3132
Application 08/268,370
This is a decision on appeal from the final rejec-
tion of claims 2 through 5 and 8, all the claims pending in
the application. Claims 1, 6 and 7 have been cancelled.
The invention relates to using scan test techniques
to test the interconnecting signal lines between digital
circuits employing different or non-compatible scan test
architectures.
Independent claim 8 is reproduced as follows:
8. A method of testing an interconnect that couples
first and second digital circuits to one another for communi-
cating data signals therebetween, the first digital circuit
being structured to include a scan architecture specified by
IEEE Standard 1149.1 that includes a first number of scannable
data registers, the second digital circuit employing a scan
archi- tecture different from that of the first digital cir-
cuit that includes a second number of data registers, the
first and second numbers of scannable data registers being
coupled to the inter- connect for applying data signals
thereto and to receive data signals therefrom, the method
including the steps of:
(a) applying a first test pattern to the second
number of scannable data registers;
(b) sampling the interconnect with the first number
of scannable data registers according to a protocol required
by the IEEE Standard 1149.1 that includes the steps of,
(i) capturing data signals of the interconnect
by the first number of scannable data
registers,
2
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