Appeal No. 1997-3132
Application 08/268,370
(ii) shifting into the first number of
scannable
data registers a second test pattern,
(iii) again capturing data signals of the
interconnect by the first number of
scannable data registers, and
(iv) shifting the captured data signals from
the
first number of scannable data registers;
(c) sampling data signals on the interconnect by
the second number of scannable data registers;
(d) shifting the sampled data signals from the
second number of scannable data registers; and
(e) comparing the captured data signals and the
sampled data signals to first and second standard patterns,
respectively, to determine the integrity of the interconnect;
and
(f) repeating steps (a) - (e) for a plurality of
additional test patterns.
The Examiner relies on the following references:
Farwell 5,202,625 Apr. 13, 1993
Shiono et al. (Shiono) 5,390,191 Feb. 14, 1995
(effective filing dates: Jan. 31 and May 28,
1992)
Gruetzner et al. (Gruetzner) 5,444,715 Aug. 22, 1995
(effective filing date: July 17,
1992)
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