Appeal No. 1997-4314 Page 5
Application No. 08/155,332
be seen in Figure 7 and column 9, lines 36 et seq, of
Takasaki, a block length value is put into LBN register 51 as
a parameter. While it may be, as appellants explain at page 8
of the brief, that Takasaki is concerned with different
logical block lengths for different machines, i.e., one value
for each machine, rather than appellants’ programmable logical
block number for any one machine, the fact that Takasaki’s LBN
register 51 can be loaded initially with a block length value,
even if it is only one value for each machine, makes that
register “programmable,” as broadly claimed, because the LBN
register can be said to have been “programmed” with that one
value. [Note, infra, the different result reached with regard
to claim 10].
Appellants further contend that Takasaki does not suggest
the claimed “input port connectable to the computer peripheral
bus,” pointing out that Takasaki does not disclose a
peripheral bus, or any bus, because Takasaki is directed to a
virtual machine that does not contain any physical bus.
However, we agree with the examiner that the data flow lines
in Takasaki are suggestive of buses. The skilled artisan
adapting Takasaki’s device for non-virtual machine
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