Appeal No. 1998-3064 Page 10
Application No. 08/445,867
Giving claims 2, 4, and 7, their broadest reasonable
interpretation, the claims recite a processor providing
address data and display data to a common drive circuit; the
common drive circuit responsively providing the address data
and display data to a selected segment drive circuit; and the
selected segment drive circuit responsively generating a
relative address for the display data.
The examiner fails to show a teaching or suggestion of
these limitations in the prior art. Koyama teaches a CPU 1
that designates address data for reading display data from and
writing data to a RAM 2. P. 8, ll. 15-24. The reference also
teaches a common drive circuit 14 that drives horizontal
common electrodes of an LCD 3 and a segment driving circuit 13
that drives vertical segment electrodes of the LCD. P. 12,
ll. 9-16. Koyama, however, does not teach providing address
data and display data to the common drive circuit, the common
drive circuit providing the address data and display data to
the segment drive circuit; or the segment drive circuit
generating a relative address for the display data.
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