Appeal No. 1997-0917
Application 08/309,565
Instruction Stream Multiple Data Stream (SIMD) multi-processor
architectures. As depicted in Figure 1, each processing
element 10 is arranged on a two dimensional lattice 12 and is
connected to its neighbors through dynamically reconfigurable
switches 14. Switches 14, as shown in Figure 3, connect four
of the processing elements in the array into a group in
accordance with either a broadcast instruction of the
controller or a special communication instruction held in one
processing element of the group. A multiplexer unit is
connected to each data line, the controller and to a
configuration register. It is adapted to load the special
communication instruction from the one processing element in
the group into a configuration register and to operate in
accord with either the broadcast instruction from the
controller or the contents of the configuration register to
select one of the four data lines as a source of data and
applying the data therefrom to a source output port.
Similarly, a demultiplexer unit is connected to each data
line, the controller and to the configuration register, as
well as to the source output port of the multiplexer unit.
The demultiplexer is adapted to operate in accord with either
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