Appeal No. 1997-1197 Application 08/130,255 the order of the bits of the words from the page memory must be reversed in the circuit of figure 3 so that when, say, word 200 is written to a display or memory in the position of word 1, during a 180-degree rotation, the bits are in the correct position. The fact that additional steps occur in the circuit of figure 3 is irrelevant to the anticipation rejection since claim 16 is open-ended and does not preclude other steps. Claim 16 does not recite that the image data is scanned to a display in the sequence it is read out; compare claim 1. The output of the figure 3 circuit goes to external apparatus (e.g., col. 8, lines 45-46) and Appellants do not contest that such apparatus includes a display. It is inherent that the pixels (bits) would be converted to unit drive signals in order to be displayed, but this is not argued. Appellants also argue that buffer memory 15 in Kajihara does not store a frame of pixel data (Br12). The Examiner does not respond to this argument. It is true that buffer memory 15 consists of RAM 1 and RAM 2, which each have a capacity of 40 words (where each word is eight bits). However, we rely on the page memory in - 10 -Page: Previous 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 NextLast modified: November 3, 2007