Ex parte LEWIS - Page 8




          Appeal No. 1997-1572                                                        
          Application 07/792,534                                                      


          disclose a collection processor and a recognition processor                 
          [brief, pages 6 to 7].  We disagree with Appellant’s position.              
          Nakatsuka, figure 1, does show a collection processor in CPU 3              
          and a part of RAM 5, since processor 3 receives the input                   
          (handwritten sample) from input device 2 and stores it in RAM               
          5.  Nakatsuka also shows a library of user character samples                
          in dictionary units 8 and 9.  Nakatsuka further shows a                     
          recognition processor as CPU 3 and unit 7.  Claim 11 does not               
          call for a general processor.  Therefore, we need not discuss               
          here arguments regarding the general processor.  Thus, we                   
          sustain the rejection of claim 11.                                          




               We now consider independent claim 1.  Additional to the                
          elements discussed above relating to claim 11, the Examiner                 
          contends that Nakatsuka also shows a general processor.  The                
          Examiner states that Nakatsuka discloses a “general processor               
          coupled to the accelerator system and operable to receive and               
          use the second data (3 in figure 1)” [answer, page 3].  The                 
          Examiner also states that Nakatsuka does not show a plurality               


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