Ex parte GIROD et al. - Page 3




          Appeal No. 1997-2474                                       Page 3           
          Application No. 08/125,590                                                  


               Claim 24, which is representative for our purposes,                    
          follows:                                                                    
               24. A digital signal processing apparatus for                          
               performing a forward discrete cosine transform,                        
               comprising:                                                            
               means for receiving a digital input signal                             
               including a sequence of input signal amplitude                         
               values;        a memory containing look up tables                      
               having a number of entries equal to a number of                        
               possible input signal amplitude values, and                            
               corresponding to values of Nth order forward                           
               Discrete Cosine Transform basis functions stored at                    
               memory addresses corresponding to input signal                         
               amplitude values;                                                      
                    means for outputting a digital output signal                      
               including a sequence of up to N output coefficient                     
               values;                                                                
                    a central processing unit operatively connected                   
               to the means for receiving, to the memory and to the                   
               means for outputting; and                                              
                    a control store of central processing unit                        
               instructions connected so as to provide the                            
               instructions to the central processing unit, the                       
               control store containing instructions to address the                   
               memory as a function of the input signal amplitude                     
               values received by the means for receiving,                            
               instructions to sum values obtained by addressing                      
               the memory so as to form output coefficient values,                    
               and instructions to provide the output coefficient                     
               values to the means for outputting.                                    


               The references relied on in rejecting the claims follow:               








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